2012-07-17 01:05:27 +02:00
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#ifndef _MEGA88_H_
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#define _MEGA88_H_
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/* Part-Code ISP */
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#define DEVTYPE_ISP 0x76
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/* Part-Code BOOT */
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#define DEVTYPE_BOOT 0x77
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#define SIG_BYTE1 0x1E
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#define SIG_BYTE2 0x93
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#define SIG_BYTE3 0x0F
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#define UART_BAUD_HIGH UBRR0H
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#define UART_BAUD_LOW UBRR0L
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#define UART_STATUS UCSR0A
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#define UART_TXREADY UDRE0
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#define UART_RXREADY RXC0
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#define UART_DOUBLE U2X0
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#define UART_CTRL UCSR0B
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#define UART_CTRL_DATA ((1<<TXEN0) | (1<<RXEN0))
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#define UART_CTRL2 UCSR0C
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#define UART_CTRL2_DATA (1<<UCSZ00)|(1<<UCSZ01)//((1<<URSEL0) | (1<<UCSZ10) | (1<<UCSZ00))
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#define UART_DATA UDR0
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2012-10-07 02:04:16 +02:00
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static inline void bootloader_wdt_off(void) {
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2012-07-17 01:05:27 +02:00
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// cli();
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wdt_reset();
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/* Clear WDRF in MCUSR */
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2012-10-07 02:04:16 +02:00
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MCUSR &= ~(1 << WDRF);
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2012-07-17 01:05:27 +02:00
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/* Write logical one to WDCE and WDE */
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/* Keep old prescaler setting to prevent unintentional time-out */
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2012-10-07 02:04:16 +02:00
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WDTCSR |= (1 << WDCE) | (1 << WDE);
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2012-07-17 01:05:27 +02:00
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/* Turn off WDT */
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WDTCSR = 0x00;
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}
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#endif // #ifndef _MEGA88_H_
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